This invention relates to charge coupled storage devices and more particularly to improvements therein.
The present preferred construction for a charged coupled storage device is one which has three or more clock phases for operating the device. The electrode structure of the three phase charge coupled device, or CCD, as it is more popularly known, has problems in that a gap is present between the metal electrode used for advancing charges down the CCD. The gap cannot be too wide, since if it is, one no longer has a homogenous flat surface potential underneath the CCD gates, which is necessary in order to enable the transfer of charge between the regions underneath the gates. The gap preferably should be on the order of one to two microns maximum. Thus far, the ability to etch geometrys that fine in production does not exist. In an attempt to overcome this, the industry uses overlapping gates in which the first and third gates are metal gates and the second gate is a poly silicon gate photolithic structure. This is a very complex structure. The overlapping gates, further more, give rise to objectionable interelectrode capacitance.